Electronic Design

Facing Up To Today’s FPGA Verification Challenges

Today it is not unusual for FPGA users to have to deal with more than one language in their designs. At earlier stages of the design development it may be necessary to interface HDL simulation with ...
TMCnet

MicroCloud Hologram Inc. Utilizes FPGA to Accelerate Tensor Network Computing to Achieve Quantum Spin Models

MicroCloud Hologram Inc. (NASDAQ: HOLO), ("HOLO" or the "Company"), a technology service provider, proposed an innovative hardware acceleration technology that converts the quantum tensor network ...
EDN

Mentor Graphics Introduces FPGA Advantage 5.0

WILSONVILLE, OR — Mentor Graphics Corp. [www.mentor.com] has introduced FPGA Advantage 5.0, an enhanced version of the popular HDL flow that provides designers with an integrated solution and more ...

MicroCloud Hologram Inc. Builds the Industry's First Multi-FPGA Quantum Fourier Transform Simulation Solution

MicroCloud Hologram Inc. (NASDAQ: HOLO), ("HOLO" or the "Company"), a technology service provider, launched a brand-new scalable quantum Fourier transform simulator technology based on multi-FPGA and ...
Semiconductor Engineering

Hybrid Emulation

Semiconductor Engineering sat down to discuss the growing usage of hybrid verification approaches with Frank Schirrmeister, senior group director of product management & marketing for Cadence; Russ ...
Yahoo Finance

MicroCloud Hologram Inc. Develops Serial-Parallel Architecture-Based FPGA Quantum Computing Simulation Framework

SHENZHEN, China, Dec. 22, 2025 (GLOBE NEWSWIRE) -- MicroCloud Hologram Inc. (NASDAQ: HOLO), (“HOLO” or the "Company"), a technology service provider, launched a brand-new FPGA-based quantum computing ...
Electronic Design

Verification Techniques For FPGA Designs

With the increasing size and complexity of FPGA devices, there is a need for more efficient verification methods. Timing simulation can be the most revealing verification method; however, it is often ...
EDN

Advantages of FPGA design methodologies

Once used only for glue logic, FPGAs have progressed to a point where system-on-chip (SoC) designs can be built on a single device. The number of gates and features has increased dramatically to ...
Business Insider

Cadence Launches Xcelium Parallel Simulator, the Industry's First Production-Proven Parallel Simulator

Delivers third generation of simulation with multi-core parallel computing as part of the industry-leading Cadence Verification Suite Provides an average 2X improved single-core performance Offers an ...
Design-Reuse

Market-Driven Open-Cores SoC-Experience

The SoC content is defined by market needs and changes every half a year. The SoC methodology is driven by silicon technology and changes every 16 months. This quick pace of change demands that the ...
Semiconductor Engineering

Why Your FPGA Synthesis Flow Requires Verification

When you think about it, logic synthesis is a vital but rather intimidating part of modern chip design. This process takes a high-level description of intended functionality, written in an RTL ...
New Electronics

Addressing safety critical FPGA designs

Field-programmable gate arrays (FPGAs) are the dominant hardware platform in many safety-critical, low-volume applications, including aerospace and nuclear power plants (NPPs). Modern FPGA devices ...